News about the KT400, P4X400, P4X600 and P4X800 from VIA
During Computex, new information about VIA's upcoming chipsets was made public. The technical data of the chipsets around the KT400, P4X400, P4X600 and P4X800 were already largely clarified in advance, but now the launch dates have also been determined more precisely.
The P4X600 , which is VIA's first dual-channel DDR-RAM chipset, will not, as has always been assumed in the past, come onto the market in the summer. The release date has now been postponed to September. It is also speculated that it will not only enable dual operation of PC2100, but also PC2700 DDR-RAM. Since the PC2100 in dual operation is already completely sufficient for the current Pentium4 with 533MHz FSB, this feature will, if it comes up, cause some conversation again. The P4X600 will also have AGP8x and a 533MB/s fast V-Link between north and southbridge.
The P4X400 , which supports DDR400 and AGP8x and 533MB/s V -Link will continue to appear in the summer. An exact date was not given. The changes compared to its predecessor, the P4X333, are unfortunately also limited with DDR400.
The P4X800 is still a long way off. With its dual-channel technology for DDR II, it is a little ahead of its time at the moment. The introduction of the P4X800 is not expected before 2003 either. Probably not until the summer of 2003. But the same applies to these chipsets: VIA still does not have a license agreement with Intel, so that many manufacturers will not rely on these chipsets if the legal basis is not clarified.
The KT400 for AMD's Athlon processors is currently somewhat dependent on the JEDEC, as it remains to be seen whether they have a DDR400 standardsay goodbye and what it will be. The release date for the KT400 was actually in the summer of this year, but VIA is currently free to choose it because SiS will probably not be releasing a new chipset for AMD Athlon processors in the near future. The SiS745 represented a temporary end here. Thus, VIA is not subject to any direct competitive pressure from SiS in this area.