New memory bus from Rambus
Rambus presented a new storage interface to the public at the ISSCC (International Solid-State Circuits Conference). Throughput rates of 2.2 GB/s should then no longer be a problem, which is around 25% faster than the fastest interface used so far DLL (delay-look loop) is generated, whereby the 'in-system timing' can be set very precisely. Better output drivers that improve the voltage level through less feedback have also been realized. In the meantime, prototypes even showed an output of 2.6 GByte/s at 1.8 V operating voltage. With QRSL (Quad Rambus Signaling Level) there is an increase of 25% in the bandwidth.