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IBM, AMD & Co. from 2009 with 32 nm process

IBM, AMD & Co. from 2009 with 32 nm process

As IBM now announced together with its development partners AMD, Chartered Semiconductor Manufacturing, Freescale, Infineon and Samsung, the companies have an innovative method for the rapid implementation of their 32 nm process with high-K dielectrics , Metal Gates and Silicon-On-Insulator technology (SOI).

Based on a so-called “High-K Gate-First” process, the new method is intended to open up a simpler and faster way to switch to 32nm and “High-K/Metal Gate” technology. In the context of silicon planar technology, the gate is placed first as standard (gate-first). Based on the gate position, the source and drain can easily be correctly positioned (self-alignment). The problem: the source/drain regions are doped at temperatures which, although they do not affect the polysilicon gate previously used, cause problems for a metal gate. Intel therefore had to switch to gate load production for its 45 nm technology (P1266) used in Penryn/Yorkfield. IBM has apparently managed to get around this problem.

The range of corresponding 32-nm products should range from chips for mobile devices to full-blown ones Server processors, such as those from IBM's Power series, are sufficient. If everything goes according to plan, the 32 nm process should be ready for use in the second half of 2009. Competitor Intel is also planning to switch to 32nm for the end of 2009.

32nm-SRAM with High-K/Metal Gate and SOI from IBM

32-nm SRAM test chip with High-K/Metal Gate and SOI by IBM

Compared to the previous technology generation in 45 nm structure width , which presented in JanuaryThe shrink factor of the chips should be up to 50 percent - the ideal value - and will only be introduced into production in the coming year. The “High-K/Metal Gate” technology is expected to save around 45 percent energy in operation. In addition, IBM will rely on Airgap (vacuum on the interconnect layers), with which the RC delay can be significantly reduced.

For the performance of processors, this should give room for increases bid by up to 30 percent. As usual, a SRAM cell manufactured in the new process served as a demonstration object for the 32 nm process. Thanks to the new manufacturing technology, their size is below 0.15 µm². For comparison: Intel presented 0.182 µm² much larger cells in its 32 nm process (P1268).

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