Duron 950 to Athlon XP 1.7+ in the test: AMD processor Roundup
- 1 Foreword
- 2 Overview
- 3 Technology
- True Performance Initiative
- 6 Requirement
- 7 Overclocking
- 8 Known bugs
- 9 Test system
- 19 Pricing
- 20 Conclusion
Since the Athlon, detailed information on known errors that have their cause in the architecture itself has been summarized in so-called revision guides at AMD. This error transparency, which has long been common at Intel, is particularly important if you want to receive precise information about the changes between individual processor steppings. For example, while an older processor stepping tended to lead to inexplicable system hang-ups, this problem may already have been eliminated in a revised version of the processor. Even with the Athlon MP, Athlon XP or Athlon 4, all of which are known to be based on the sixth model of the Athlon processor,Codenamed Palomino , three revisions and processor steppings are now on the market. For example, the old Athlon Model 4, code name Thunderbird , had six steppings from A4 to A9. The A8 stepping never left the development halls.
Overall, AMD goes into seven errors in Model 4 in more detail. However, anyone who believes that the A9 stepping removed all the errors from the old Athlon is greatly mistaken, because when stepping from revision A7 to A9, only one error was eliminated. In addition, there is a new bug with the A9 stepping of the Athlon, which is also included in the current A5 stepping of the Athlon XP. Of course, the errors are more or less uncritical. One of the more acute problems here is occasional hanging when waking up from standby mode when a clock multiplier with a decimal point, for example 9.5 or 8.5, is used to generate the processor clock. This error occurs with exactly two ACPI power saving modes (C2 and C3). AMD therefore suggests to the motherboard manufacturers to deactivate this support in the BIOS from the start and announces a bug fix in a new stepping.
In fact, this error was corrected in the first stepping (A0) of the latest Athlon processor generation (Model 6). The current stepping of the Athlon XP is A5 and is error-free apart from one bug (there is another error with the Athlon MP, which is irrelevant for the Athlon XP). Interestingly, the error was temporarily absent in A0 and A2 stepping. The error is called 'Processor Does Not Support Reliable Microcode Patch Mechanism', which means that the processor does not have a reliable microcode patch mechanism. However, the error is not that serious. Because it is quite possible to load a processor patch into the patch RAM responsible for it,however, AMD has deactivated the Build In Self Test (BIST) for this patch RAM in the latest stepping. AMD only warns of possible problems when using this function, through which, for example, errors can be created or circumvented via BIOS update.
About the errors of the new Duron (Model 7), code name Morgan , on the other hand, nothing is known yet. In the old Duron with Spitefire core (Model 3), seven errors were known, some of which were also included in the Athlon Model 4. In total there were two steppings on the old Duron, stepping A0 and A2. The A2 stepping was relieved by two errors. A problem that perhaps most likely got through the media was the fact that the A0 stepping when reading out the CPUID, e.g. with the program WCPUID, identified an L2 cache with a size of 1kb. It should be clear that this cannot be true. If a new A2 stepping is in the computer, the correct 64kb L2 cache is now reported. Which errors have made it into the A0 stepping of the Duron (Model 7) with Morgan Kern will only become apparent over time, when AMD publishes the corresponding revision guides. The following table shows the CPUIDs that can be used to find out the stepping of the processor core.
Incidentally, all of the processors we used in the test had the latest stepping of the processor series.
On the next page: Test system