Menu
AMD introduces hammer architecture

AMD introduces hammer architecture

At the microprocessor forum, AMD gave detailed insights into its microprocessor architecture, known under the code name 'Hammer'. The innovations of the Hammer architecture include a higher bandwidth, extremely powerful, integrated memory, an I/O controller and multiprocessor capability.

Further innovations are a highly scalable system bus that uses HyperTransport technology and thus enables both single and multi-processor configuration. These innovations are intended to reduce possible bottlenecks in data transfer and to accelerate the transfer of information, as they ensure improved computing power and thus increased productivity. One of the most important advantages of the hammer is that the architecture seamlessly supports not only 32-bit but also 64-bit software and thus a gradual switch to 64-bit programs is possible and at the same time older programs can be executed with tried and tested performance. The hammer architecture is based on the Athlon XP or the entire K7 series, which has been heavily optimized in some areas. As already mentioned, it has an improved memory interface, additional 64-bit registers and can manage up to a megabyte L2 cache. Thanks to the integrated memory controller, the architecture can offer an effective memory bandwidth of up to eight GByte/s. In direct comparison to Intel's Pentium 4 with 2GHz, AMD's hammer architecture is said to be twice as fast as the competitor with a clock frequency of 2GHz, the maximum possible L2 cache and a 128-bit wide memory interface. The CPU currently being developed under the code name Sledgehammer will, however, mostly be found in multi-processor systems. The slimmed-down processor variant with Hammer architecture has a 256KB L2 cache and a 64Bit wide interface and is currently under the code name Clawhammerunder development.